1. Field of the Invention
The invention relates to a memory circuit comprising a regular memory area and a redundant memory area, and to a method for repairing a memory circuit comprising redundant memory areas.
2. Description of the Related Art
High-capacity memory circuits are difficult to produce without any errors. After the production of the memory circuits, single cell errors or errors in memory areas typically occur, which are corrected by a subsequent repair step. The repair step provides for the defective memory areas or the memory areas with a defective single cell to be replaced by a corresponding redundant memory area, so that when the address of the defective memory area is present, the redundant memory area is addressed instead of the regular addressed memory area.
Memory circuits that have been produced and repaired in this way are then usually combined to form modules and tested again. When the memory circuits are combined to form modules, one or more errors may occur in one or more of the memory circuits of the modules on account of cell degradation effects. Since such a memory module is constructed from a relatively large number of memory circuits, e.g. 36, the probability of such a single cell error occurring in a memory module is rather high, thereby greatly reducing the yield in the production of memory modules.
Some manufacturers of memory modules provide electrical fuses in order to repair single cell errors after the construction of the memory module. This is carried out for example by providing individual registers in the logics sections situated in the memory circuit. These registers may be provided so as to replace individually defective memory cells. This is carried out by the programming of electrical fuses with the aid of electric currents after the module has been constructed. The error address is set in the electrical fuses in this case. This has the disadvantage that additional chip area is required in order to accommodate additional logic circuits and register circuits. Moreover, the registers themselves may be defective and then furthermore have to be repaired.
Furthermore, single cell errors appearing after the construction of the memory module can be repaired by further redundant memory areas in the memory cell array. This can be performed by selection of the further redundant memory areas by means of electrical fuses. In other words, when an address set by the electrical fuses is present, a further redundant memory area is addressed instead of the memory area with the defective single cell. This has the disadvantage that additional redundant memory areas have to be provided which are used only in the case when a single cell error occurs after the assembly of the memory module. These require additional chip area and thus increase the costs of producing the memory circuits.